1. Field of the Invention
The present invention relates to a capacitor structure. More particularly, the present invention relates to a capacitor structure having a three-dimensional electrode.
2. Description of the Related Art
Capacitor is one of the indispensable elements in an integrated circuit. In the design and fabrication of a capacitor, the capacitance and setup area of the capacitor is an important consideration. Thus, better capacitor design and fabrication method is always sought after.
For example, the memory unit (or memory cell) of a dynamic random access memory (DRAM) generally includes a transistor and a capacitor serving as a storage device for saving bit-sized data. By selectively charging or discharging each capacitor in an array of capacitors on a semiconductor substrate, vast data can be stored. For a memory capacitor having a fixed operating voltage, the capacitance of the capacitor mainly depends on the surface area of the capacitor electrode when the pitch between the electrodes and the dielectric constant of the dielectric material are fixed.
FIG. 1 is a perspective view showing the structure of a conventional parallel plate capacitor. As shown in FIG. 1, the parallel-plate capacitor structure 100 mainly comprises a top electrode plate 110, a bottom electrode plate 120 and a dielectric layer 130 disposed between the top electrode plate 110 and the bottom electrode plate 120. The top electrode plate 110 and the bottom electrode plate 120 are parallel to each other and are separated from each other by a distance d. Conventionally, this type of parallel-plate capacitor structure 100 utilizes the parallel electric field generated between the top electrode plate 110 and the bottom electrode plate 120 to obtain the desired capacitance value, i.e. parallel plate capacitance. Hence, the capacitance of the parallel-plate capacitor structure 100 is directly proportional to the surface area of the top electrode plate 110 and the bottom electrode plate 120.
With the rapid progress in semiconductor manufacturing technology, integrated circuits are increasingly miniaturized and integrated. Because the conventional parallel-plate capacitor structure demands considerable area, it no longer meets the design requirement for a high level of circuit integration. In other words, taking the aforementioned DRAM as an example, if the conventional parallel-plate capacitor structure is adopted, the minimized memory cell cannot accommodate the top and the bottom electrode plates. Consequently, the capacitance value of the capacitor is relatively reduced. As the capacitance of the capacitor is reduced, the probability of having data storage error is significantly increased.
Hence, a capacitor structure with higher capacitance and a high degree of integration is highly desired, which can increase the surface area of the electrode plates while the area occupied by the storage capacitor is reduced.